A logic circuit can look like a crowd of unfamiliar symbols until you follow one input combination through it. Each gate performs a small rule. A truth table checks that their combined behaviour matches the task for every allowed case.
We move from basic gates to equality tests, universal constructions, a manually controlled selector and a half adder, keeping Boolean operations distinct from arithmetic.
What you will learn to do
- Distinguish logic values from technology-dependent voltage ranges.
- Construct complete tables for basic, inverted and exclusive gates.
- Track inversion scope and intermediate circuit signals.
- Use Boolean identities and De Morgan’s laws with explanations.
- Build basic functions from NAND or NOR gates.
- Interpret a two-to-one selector and test all its input cases.
- Separate half-adder sum and carry outputs.
- Distinguish settled truth-table equivalence from timing behaviour.
Study with a tutor prompt
Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits Learning goals: - Distinguish logic values from technology-dependent voltage ranges. - Construct complete tables for basic, inverted and exclusive gates. - Track inversion scope and intermediate circuit signals. - Use Boolean identities and De Morgan’s laws with explanations. - Build basic functions from NAND or NOR gates. - Interpret a two-to-one selector and test all its input cases. - Separate half-adder sum and carry outputs. - Distinguish settled truth-table equivalence from timing behaviour. Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding. Tutoring approach: Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.
BEFORE YOU READ
Bring back one idea
Try a sentence or a sketch before opening the comparison. If this is new, use the explanation to get started.
Does a binary logic value have to mean an exact mathematical voltage of zero or one volt?
Compare your reasoning
No. Logic values are represented by specified voltage ranges in a circuit family. The Boolean model abstracts those physical levels; it does not replace the electrical requirements.
Revisit the explanation →01 / Logic gates, complete truth tables and useful circuits
A logic value is an interpretation of a physical signal
Digital logic represents information using two logical values, 0 and 1. A circuit interprets ranges of input voltage as those values. The exact voltage ranges depend on the logic family and supply, so logical 1 does not universally mean exactly 5 V.
In positive logic, the higher valid voltage range represents 1 and the lower valid range represents 0. Voltages between guaranteed input ranges may have an unspecified interpretation; they are not automatically a third intended logic value.
A combinational circuit’s settled output is determined by its current inputs. A sequential circuit also contains state or memory. The gates in this chapter are analysed first as ideal combinational functions after signals have settled.
Choose the meaning of each input before writing a formula. For example, a signal may be 1 when a switch is pressed, or 0 when it is pressed in an active-low design. The same physical event can therefore have different logical encodings.
Study with a tutor prompt
Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits Focus: A logic value is an interpretation of a physical signal Learning goals: - Distinguish logic values from technology-dependent voltage ranges. - Construct complete tables for basic, inverted and exclusive gates. - Track inversion scope and intermediate circuit signals. - Use Boolean identities and De Morgan’s laws with explanations. - Build basic functions from NAND or NOR gates. - Interpret a two-to-one selector and test all its input cases. - Separate half-adder sum and carry outputs. - Distinguish settled truth-table equivalence from timing behaviour. Equations in this section (LaTeX): Build the physical reasoning before choosing an equation. Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding. Tutoring approach: Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.
02 / Logic gates, complete truth tables and useful circuits
NOT, AND and OR express three elementary decisions
NOT reverses one input: NOT 0 = 1 and NOT 1 = 0. It is commonly written with an overbar or the symbol ¬. It does not mean a negative number; its result is still a logic value.
AND gives 1 only when all its stated inputs are 1. For two inputs it represents a requirement that both conditions hold. OR gives 1 when at least one input is 1, including the case where both are 1.
A truth table lists the output for every allowed input combination. Two binary inputs require four rows. Rather than guessing from one test case, a complete table verifies the whole function.
Parentheses identify which operation is performed first. In written Boolean algebra, NOT is usually applied before AND, and AND before OR, but explicit grouping is clearer when translating a circuit.
Each expression evaluates to 0 or 1. OR is inclusive unless explicitly labelled exclusive.
| A | B | A AND B | A OR B |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 |
WORKED EXAMPLE
Translate a requirement before simplifying it
A hypothetical alarm should activate only when it is enabled and at least one of two sensors reports a fault. Let E = enabled, T = first fault and P = second fault, all active high. Write the output function and evaluate E = 0, T = 1, P = 1.
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Study with a tutor prompt
Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits
Focus: NOT, AND and OR express three elementary decisions
Learning goals:
- Distinguish logic values from technology-dependent voltage ranges.
- Construct complete tables for basic, inverted and exclusive gates.
- Track inversion scope and intermediate circuit signals.
- Use Boolean identities and De Morgan’s laws with explanations.
- Build basic functions from NAND or NOR gates.
- Interpret a two-to-one selector and test all its input cases.
- Separate half-adder sum and carry outputs.
- Distinguish settled truth-table equivalence from timing behaviour.
Equations in this section (LaTeX):
\mathrm{NOT}:\ \neg A,\qquad\mathrm{AND}:\ A\land B,\qquad\mathrm{OR}:\ A\lor B
Meaning: Each expression evaluates to 0 or 1. OR is inclusive unless explicitly labelled exclusive.
Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding.
Tutoring approach:
Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.03 / Logic gates, complete truth tables and useful circuits
NAND and NOR invert an entire grouped result
NAND means NOT of AND, so its output is zero only when both inputs are one. NOR means NOT of OR, so its output is one only when both inputs are zero.
The scope of the inversion matters. NOT(A AND B) is not the same as (NOT A) AND B. A small inversion mark at a gate’s output refers to the whole gate result, while an inversion on one input changes only that input signal.
A complete truth table can identify a gate even when its symbol is unfamiliar. Look for the unique zero row of NAND or the unique one row of NOR, then verify all rows.
Gate labels describe logical functions, not a universal physical implementation. A real NAND gate can be built with different transistor technologies while preserving the same settled truth table.
The inversion applies to the complete parenthesized operation.
| A | B | NAND | NOR |
|---|---|---|---|
| 0 | 0 | 1 | 1 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 |
WORKED EXAMPLE
Check which expression the inversion covers
For A = 0 and B = 0, compare NOT(A AND B) with (NOT A) AND B.
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Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits
Focus: NAND and NOR invert an entire grouped result
Learning goals:
- Distinguish logic values from technology-dependent voltage ranges.
- Construct complete tables for basic, inverted and exclusive gates.
- Track inversion scope and intermediate circuit signals.
- Use Boolean identities and De Morgan’s laws with explanations.
- Build basic functions from NAND or NOR gates.
- Interpret a two-to-one selector and test all its input cases.
- Separate half-adder sum and carry outputs.
- Distinguish settled truth-table equivalence from timing behaviour.
Equations in this section (LaTeX):
\mathrm{NAND}(A,B)=\neg(A\land B),\qquad\mathrm{NOR}(A,B)=\neg(A\lor B)
Meaning: The inversion applies to the complete parenthesized operation.
Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding.
Tutoring approach:
Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.04 / Logic gates, complete truth tables and useful circuits
XOR detects unequal inputs; XNOR detects equal inputs
For two inputs, exclusive OR, or XOR, gives 1 when exactly one input is 1. It differs from inclusive OR in the A = B = 1 row: inclusive OR gives 1 while XOR gives 0.
XNOR is the inverse of XOR and gives 1 when the two inputs agree. It can act as a one-bit equality test. Agreement includes both 0,0 and 1,1.
A useful expression for XOR is (A AND NOT B) OR (NOT A AND B). The two branches represent the two distinct unequal cases. XNOR can be written (A AND B) OR (NOT A AND NOT B).
For a multi-input XOR formed by chaining binary XORs, output is 1 when an odd number of inputs are 1. The phrase exactly one is specific to the two-input table and should not be extended to three or more inputs without checking.
Binary XOR is inequality; chained XOR is odd parity.
| A | B | XOR | XNOR |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
WORKED EXAMPLE
Three-input XOR is an odd-parity test
Evaluate (A XOR B) XOR C for A = B = C = 1.
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Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits
Focus: XOR detects unequal inputs; XNOR detects equal inputs
Learning goals:
- Distinguish logic values from technology-dependent voltage ranges.
- Construct complete tables for basic, inverted and exclusive gates.
- Track inversion scope and intermediate circuit signals.
- Use Boolean identities and De Morgan’s laws with explanations.
- Build basic functions from NAND or NOR gates.
- Interpret a two-to-one selector and test all its input cases.
- Separate half-adder sum and carry outputs.
- Distinguish settled truth-table equivalence from timing behaviour.
Equations in this section (LaTeX):
A\oplus B=(A\land\neg B)\lor(\neg A\land B),\qquad\mathrm{XNOR}(A,B)=\neg(A\oplus B)
Meaning: Binary XOR is inequality; chained XOR is odd parity.
Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding.
Tutoring approach:
Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.05 / Logic gates, complete truth tables and useful circuits
Name intermediate signals and evaluate the network in order
A multi-gate circuit becomes easier to analyse when every intermediate wire has a name. Evaluate the gates closest to the inputs first, then use those results as inputs to the next stage.
For Y = NOT(A OR B) OR (A AND B), define X = NOT(A OR B) and Z = A AND B. The final OR combines the both-zero case from X with the both-one case from Z, so Y is an equality function.
A truth table with intermediate columns exposes mistakes that can be hidden by a final answer alone. It is also useful when checking a proposed simplification: compare the final columns for every input row.
For n independent binary inputs there are 2ⁿ combinations. A few selected rows can disprove equivalence, but proving equivalence by exhaustive truth-table comparison requires every row.
| A | B | X = NOT(A OR B) | Z = A AND B | Y = X OR Z |
|---|---|---|---|---|
| 0 | 0 | 1 | 0 | 1 |
| 0 | 1 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 |
| 1 | 1 | 0 | 1 | 1 |
WORKED EXAMPLE
Recognize a function from its complete output column
A circuit’s output for inputs 00, 01, 10 and 11 is respectively 1, 0, 0 and 1. Which standard two-input function does it implement?
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Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits Focus: Name intermediate signals and evaluate the network in order Learning goals: - Distinguish logic values from technology-dependent voltage ranges. - Construct complete tables for basic, inverted and exclusive gates. - Track inversion scope and intermediate circuit signals. - Use Boolean identities and De Morgan’s laws with explanations. - Build basic functions from NAND or NOR gates. - Interpret a two-to-one selector and test all its input cases. - Separate half-adder sum and carry outputs. - Distinguish settled truth-table equivalence from timing behaviour. Equations in this section (LaTeX): Build the physical reasoning before choosing an equation. Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding. Tutoring approach: Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.
06 / Logic gates, complete truth tables and useful circuits
Boolean identities simplify logic without changing any truth-table row
Idempotence means A OR A = A and A AND A = A. Complement rules give A OR NOT A = 1 and A AND NOT A = 0. These follow by checking the two possible values of A.
Absorption gives A OR (A AND B) = A. If A is one, the first term already makes the OR one; if A is zero, both terms are zero. This case argument explains the identity rather than merely naming it.
De Morgan’s laws move an inversion across a grouped operation while changing AND to OR or OR to AND: NOT(A AND B) = (NOT A) OR (NOT B), and NOT(A OR B) = (NOT A) AND (NOT B). Both inputs must be inverted.
A simplification should preserve the complete function, including any active-low interpretation. Algebra can reduce a network, but an omitted bar or misplaced parenthesis can reverse the intended condition.
De Morgan’s laws invert each operand and exchange the operation.
WORKED EXAMPLE
Factor an expression and use complementarity
Simplify Y = (A AND B) OR (A AND NOT B).
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Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits Focus: Boolean identities simplify logic without changing any truth-table row Learning goals: - Distinguish logic values from technology-dependent voltage ranges. - Construct complete tables for basic, inverted and exclusive gates. - Track inversion scope and intermediate circuit signals. - Use Boolean identities and De Morgan’s laws with explanations. - Build basic functions from NAND or NOR gates. - Interpret a two-to-one selector and test all its input cases. - Separate half-adder sum and carry outputs. - Distinguish settled truth-table equivalence from timing behaviour. Equations in this section (LaTeX): \neg(A\land B)=\neg A\lor\neg B,\qquad\neg(A\lor B)=\neg A\land\neg B Meaning: De Morgan’s laws invert each operand and exchange the operation. Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding. Tutoring approach: Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.
07 / Logic gates, complete truth tables and useful circuits
NAND alone or NOR alone can build the basic operations
Tie both inputs of a NAND gate to A. Its output is NOT(A AND A) = NOT A, so one NAND can act as an inverter. Inverting the output of NAND(A,B) then produces AND.
To obtain OR from NAND gates, first invert each input with a tied-input NAND, then apply NAND to those inverted signals. De Morgan’s law gives NOT[(NOT A) AND (NOT B)] = A OR B.
Because NOT, AND and OR can be built this way, NAND is called a universal gate. NOR is also universal: tying its inputs gives NOT; inverting a NOR output gives OR; NOR of separately inverted inputs gives AND.
A gate-count claim depends on the allowed gate type, available complemented inputs and sharing of intermediate signals. The constructions here demonstrate possibility. They do not establish a universal minimum transistor count or propagation delay.
WORKED EXAMPLE
Build OR from three NAND operations
Let X = NAND(A,A), Z = NAND(B,B) and Y = NAND(X,Z). Show that Y equals A OR B.
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Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits Focus: NAND alone or NOR alone can build the basic operations Learning goals: - Distinguish logic values from technology-dependent voltage ranges. - Construct complete tables for basic, inverted and exclusive gates. - Track inversion scope and intermediate circuit signals. - Use Boolean identities and De Morgan’s laws with explanations. - Build basic functions from NAND or NOR gates. - Interpret a two-to-one selector and test all its input cases. - Separate half-adder sum and carry outputs. - Distinguish settled truth-table equivalence from timing behaviour. Equations in this section (LaTeX): Build the physical reasoning before choosing an equation. Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding. Tutoring approach: Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.
08 / Logic gates, complete truth tables and useful circuits
A three-input network can choose which data bit reaches the output
Consider Y = (A AND B) OR ((NOT A) AND C). Input A acts as a selector, while B and C are data inputs. If A = 1, the first branch becomes B and the second becomes zero. If A = 0, the first becomes zero and the second becomes C.
The network therefore routes B when A is high and C when A is low. This is a two-to-one multiplexer in the ideal combinational model. The selector itself is information controlling which other signal is passed.
Only one branch is enabled by A and NOT A in the settled Boolean model. If B and C have equal values, changing A does not change the settled output. Changing an unselected data input also leaves the output unchanged.
A physical implementation has unequal gate delays, so a changing selector can briefly produce a transient even when the final truth-table result is unchanged. The static truth table describes settled states; it is not a complete timing diagram.
Ideal two-to-one selection after signals settle. A is the select input, not a third data bit being arithmetically added.
INTERACTIVE LAB
Trace both branches of a selector
Set B and C to different values, then change A. Next make B and C equal and change A again. Use the intermediate outputs to explain the result.
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WORKED EXAMPLE
Use a case split instead of evaluating every symbol repeatedly
For Y = AB OR ((NOT A)C), take B = 1 and C = 0. Find Y for A = 0 and A = 1. Here juxtaposition means AND.
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Study with a tutor prompt
Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits
Focus: A three-input network can choose which data bit reaches the output
Learning goals:
- Distinguish logic values from technology-dependent voltage ranges.
- Construct complete tables for basic, inverted and exclusive gates.
- Track inversion scope and intermediate circuit signals.
- Use Boolean identities and De Morgan’s laws with explanations.
- Build basic functions from NAND or NOR gates.
- Interpret a two-to-one selector and test all its input cases.
- Separate half-adder sum and carry outputs.
- Distinguish settled truth-table equivalence from timing behaviour.
Equations in this section (LaTeX):
Y=(A\land B)\lor(\neg A\land C)=\begin{cases}C,&A=0,\\B,&A=1.\end{cases}
Meaning: Ideal two-to-one selection after signals settle. A is the select input, not a third data bit being arithmetically added.
Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding.
Tutoring approach:
Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.09 / Logic gates, complete truth tables and useful circuits
A half adder separates the sum bit from the carry bit
Adding two one-bit numbers can produce the binary results 0, 1 or 10. One output bit is therefore insufficient to represent every result. A half adder provides a sum bit S and a carry bit C.
The sum bit is A XOR B, while the carry is A AND B. For inputs 1 and 1, the sum bit is zero and the carry one, representing binary 10, which is decimal two.
This arithmetic application helps distinguish Boolean OR from addition. Inclusive OR would produce one for 1,1 and lose the carry information. The pair of outputs together represents the arithmetic result.
A full adder adds a third carry-in bit and has a different complete truth table. The half-adder name signals that no carry-in is included. State which device is being described before using its output formulas.
The last equality uses ordinary integer arithmetic to interpret the two Boolean output bits.
WORKED EXAMPLE
Check all arithmetic information in the output pair
A half adder receives A = 1 and B = 1. Find S and C and interpret the binary output.
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Study with a tutor prompt
Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits
Focus: A half adder separates the sum bit from the carry bit
Learning goals:
- Distinguish logic values from technology-dependent voltage ranges.
- Construct complete tables for basic, inverted and exclusive gates.
- Track inversion scope and intermediate circuit signals.
- Use Boolean identities and De Morgan’s laws with explanations.
- Build basic functions from NAND or NOR gates.
- Interpret a two-to-one selector and test all its input cases.
- Separate half-adder sum and carry outputs.
- Distinguish settled truth-table equivalence from timing behaviour.
Equations in this section (LaTeX):
S=A\oplus B,\qquad C=A\land B,\qquad A+B\ \text{(arithmetic)}=S+2C
Meaning: The last equality uses ordinary integer arithmetic to interpret the two Boolean output bits.
Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding.
Tutoring approach:
Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.10 / Logic gates, complete truth tables and useful circuits
A truth table is a settled-state model, not a promise of instantaneous switching
Physical gates take time to respond. Their output can pass through intermediate voltages before settling into a valid logic range. A Boolean expression suppresses that timing detail to describe the intended final relation.
When one input reaches a later gate through two paths with different delays, temporary glitches can occur. Simplifying two expressions to the same truth table proves their settled logical equivalence, not necessarily identical transient behaviour.
Unused or floating inputs cannot simply be assigned a convenient zero unless the circuit provides a defined bias or the device specification guarantees it. Similarly, an active-low signal should be interpreted using its declared meaning, not its label alone.
For a systematic exam solution, define input meanings, name intermediate signals, complete the relevant truth table, simplify with justified identities, and finally check whether the question asks about a settled value or a time-dependent waveform.
STOP & THINK
Two circuits have identical complete truth tables. What has been established?
- Their settled Boolean functions are equal
- Their propagation delays must be identical
- Their physical voltage levels must be identical for every technology
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Study with a tutor prompt
Copy this into your AI assistant, then describe where you got stuck. It asks the tutor to coach you one step at a time. Check its reasoning against the lesson.
Topic: Logic gates, complete truth tables and useful circuits Focus: A truth table is a settled-state model, not a promise of instantaneous switching Learning goals: - Distinguish logic values from technology-dependent voltage ranges. - Construct complete tables for basic, inverted and exclusive gates. - Track inversion scope and intermediate circuit signals. - Use Boolean identities and De Morgan’s laws with explanations. - Build basic functions from NAND or NOR gates. - Interpret a two-to-one selector and test all its input cases. - Separate half-adder sum and carry outputs. - Distinguish settled truth-table equivalence from timing behaviour. Equations in this section (LaTeX): Build the physical reasoning before choosing an equation. Start by checking the prerequisite idea I need most. Use a simple example, then change one condition to test my understanding. Tutoring approach: Act as a patient physics tutor. Ask what I understand and what I have tried, then wait for my reply. Teach one step at a time; do not give the final answer or a complete solution immediately. Start with a physical picture. Define unfamiliar symbols and operators, explain signs and units, and state the model's assumptions. Give progressively stronger hints only when I need them. Ask me to predict a change before calculating it. When I finish, help me check dimensions and a limiting case, then ask one related transfer question. If information is missing or ambiguous, ask rather than inventing it. Distinguish exact results from approximations and acknowledge uncertainty.
BRING THE IDEAS TOGETHER
What should stay with you
- Logical 0 and 1 represent specified voltage ranges, not universal exact voltages.
- OR is inclusive; two-input XOR is inequality and XNOR is equality.
- Inversion of a whole expression differs from inversion of one input.
- A complete n-input truth table has 2ⁿ rows.
- De Morgan’s laws invert each operand while exchanging AND and OR.
- NAND and NOR can each construct the basic Boolean operations.
- A selector routes one data input according to its select bit.
- A half adder has sum A XOR B and carry A AND B.
- Truth tables describe settled logic; physical delays can create transients.
RETRIEVE, THEN EXPLAIN
Try it without the examples
Work these out before checking. If an answer surprises you, identify which assumption or step needs another look. A correct choice is most useful when you can explain why the alternatives fail.
SELF CHECK 1
How many rows are needed for a complete truth table with four independent binary inputs?
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SELF CHECK 2
A half adder has sum bit S = 1 and carry bit C = 0. What ordinary integer does the output pair represent?
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SELF CHECK 3
For A = B = 1, which pair gives OR and XOR outputs respectively?
- 1 and 0
- 0 and 1
- 1 and 1
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SELF CHECK 4
Which expression equals NOT(A OR B)?
- (NOT A) OR (NOT B)
- (NOT A) AND (NOT B)
- A AND B
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SELF CHECK 5
What does A OR (A AND B) simplify to?
- A
- B
- NOT A
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SELF CHECK 6
For Y = (A AND B) OR ((NOT A) AND C), which input reaches the settled output when A = 0?
- B
- C
- NOT C
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SELF CHECK 7
Tie both inputs of a NAND gate to A. What output follows?
- A
- NOT A
- Always zero
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SELF CHECK 8
Does logical 1 always mean exactly 5 V?
- Yes, in every digital circuit
- No; the valid voltage range depends on the device and supply
- Only when the input is called A
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APPLY THE CHAPTER
Take the ideas into a problem
Try a complete problem next. Commit to a method before revealing a hint, then compare your reasoning with the worked solution.
Both NAND inputs are highBeginner · Hints and guided reasoningRead a circuit one gate at a timeIntermediate · Hints and guided reasoningRecognize a combined logic conditionAdvanced · Hints and guided reasoningCOME BACK TO THE IDEA
What can you explain later?
Try these from memory at your next study session, then again a few days later. Say your reasoning aloud or sketch it before looking. Adjust the gap to what you can explain.
Next study session
Why is testing a logic network on one convenient input combination insufficient?
Compare your reasoning
Different combinations can activate different paths or expose an inversion mistake. A complete truth table checks every combination for a small combinational circuit.
Revisit the explanation →A few days later: change the situation
A Boolean expression predicts the correct final output. Does it guarantee that a real circuit never shows a brief unwanted pulse after inputs change?
Compare your reasoning
No. Real gates have propagation delays, and unequal paths can create transient glitches. Static truth tables describe settled logic; timing is an additional physical question.
Revisit the explanation →Compare the physical reason, the assumptions and the conclusion. Your wording can differ. If one part is missing, revisit that section and try explaining it again after a break.
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