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PRACTICE / Logic gates and truth tables

Both NAND inputs are high

An ideal two-input NAND gate receives A = 1 and B = 1.

What is its output?

Organize the givens & assumptions
  • A = 1
  • B = 1

Ideal combinational NAND gate with stable binary inputs; ignore propagation delay.

  1. AAlternates between 0 and 1\text{Alternates between 0 and 1}
  2. B0 (LOW)0\ \text{(LOW)}
  3. C1 (HIGH)1\ \text{(HIGH)}
  4. D12 (intermediate)\tfrac12\ \text{(intermediate)}

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